描述
本文研究了非對(duì)稱型門極換向晶閘管(ASGCT)器件的結(jié)構(gòu)特點(diǎn)與設(shè)計(jì)、工藝設(shè)計(jì)以及改善器件性能的關(guān)鍵工藝技術(shù),主要內(nèi)容如下:⒈ 提出了ASGCT器件的優(yōu)化設(shè)計(jì)方法,為器件最終正確地實(shí)現(xiàn)奠定了基礎(chǔ)。由于至今ASGCT器件工程設(shè)計(jì)尚未見系統(tǒng)的定量理論報(bào)道,本文以600A/3000V非對(duì)稱型門極換流晶閘管為例,定量研究優(yōu)化設(shè)計(jì)ASGCT時(shí)工藝參數(shù)和結(jié)構(gòu)參數(shù)之間所應(yīng)該滿足的必要條件和設(shè)計(jì)原則。⒉ 半絕緣多晶硅(SIPOS)可作為鈍化材料來改善高壓平面器件的性能,通常采用低壓化學(xué)氣相淀積(LPCVD)方法生長SIPOS鈍化膜。但將其應(yīng)用于臺(tái)面功率器件卻帶來工藝上的不便。本文采用直流輝光放電法在臺(tái)面功率半導(dǎo)體器件上生長SIPOS鈍化膜。研究結(jié)果表明,SIPOS鈍化的功率器件性能要好于聚酰亞胺鈍化的功率器件,可以有效地提高功率器件的可靠性?;诖颂岢隽薙IPOS/PI復(fù)合鈍化結(jié)構(gòu)來改善臺(tái)面功率半導(dǎo)體器件的表面特性。

5SHY35L4512
This article studies the structural characteristics and design, process design, and key process technologies for improving device performance of asymmetric gate commutated thyristor (ASGCT) devices. The main content is as follows: 1. An optimization design method for ASGCT devices is proposed, laying the foundation for the final and correct implementation of the devices. Due to the lack of systematic quantitative theoretical reports on the engineering design of ASGCT devices, this article takes 600A/3000V asymmetric gate commutated thyristors as an example to quantitatively study the necessary conditions and design principles that should be met between process and structural parameters when optimizing the design of ASGCT Semi insulating polycrystalline silicon (SIPOS) can be used as a passivation material to improve the performance of high-voltage planar devices. Low voltage chemical vapor deposition (LPCVD) is commonly used to grow SIPOS passivation films. But applying it to tabletop power devices brings technological inconvenience. This article uses direct current glow discharge method to grow SIPOS passivation film on mesa power semiconductor devices. The research results indicate that the performance of power devices passivated by SIPOS is better than that of power devices passivated by polyimide, which can effectively improve the reliability of power devices. Based on this, a SIPOS/PI composite passivation structure is proposed to improve the surface characteristics of mesa power semiconductor devices.
ABB IGCT模塊5SHY4045L0004/5SHY6545L0001 AC10272001R0101 5SXE10-0181、5SHY35L4520、5SHY5045L0020、ABB IGCT模塊5SHY4045L0004/5SHY6545L0001 AC10272001R0101 5SXE10-0181、5SHY35L4520、5SHY5045L0020ABB IGCT模塊5SHY4045L0004/5SHY6545L0001 AC10272001R0101 5SXE10-0181
5SHY35L4520、5SHY5045L0020ABB IGCT模塊5SHY4045L0004/5SHY6545L0001 AC10272001R0101 5SXE10-0181、pm511v16、5SHY35L4520、5SHY5045L0020ABB IGCT模塊5SHY4045L0004/5SHY6545L0001 AC10272001R0101 5SXE10-0181、5SHY35L4520、5SHY5045L0020 ABB IGCT模塊5SHY4045L0004/5SHY6545L0001 AC10272001R0101 5SXE10-0181,5SHY35L4520、5SHY5045L0020ABB IGCT模塊5SHY4045L0004/5SHY6545L0001 AC10272001R0101 5SXE10-0181、5SHY35L4520、5SHY5045L0020ABB IGCT模塊5SHY4045L0004/5SHY6545L0001 AC10272001R0101 5SXE10-0181、5SHY35L4520、5SHY5045L0020
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